February 4, 2010 -- In some capacitive-sensor applications, the ability to obtain noise levels as low as 10 aF (atofarad) rms in capacitive-sensor-interface ASICs is critical to high performance. To achieve such low noise levels, a mixed-signal-IC developer must have extensive knowledge of sensor characteristics, as well as an ability to accurately model the sensor-IC interface. Developers must use a top-down method, modeling each subblock at a high level to meet overall system-performance requirements. Developers use simulation tools for this task, and the selection of those tools depends on the level in the hierarchy, ensuring an efficient design process.

To achieve low noise levels, developers must vigorously examine and extensively verify the models the foundry supplies. Developers must also have precise knowledge of the simulation tool and its limitations. A knowledgeable mixed-signal-ASIC-development group also uses silicon-validated IP (intellectual property). A large portfolio of high-resolution sigma-delta converters; low-offset, low-noise amplifiers; and stable voltage references provides a basis for future designs and offers confidence that ASICs will meet required performance.

By Thierry Masson, analog- and mixed-signal expert designer and Andrew Glascott-Jones, application engineer at e2v.